Infineon, Xilinx & Xylon launchen logiHSSL IP Core für High-Speed Safety Microcontroller Integration

Infineon Technologies, in Partnerschaft mit Xilinx und Xylon, announced logiHSSL IP Core auf Embedded World 2019. Dieses Low-Pin Interface Unlocks High-Speed Serial Communication Between Infineons Safety-Certified AURIX TC2xx und TC3xx Mikrocontrollern und Xilinx SoC, MPSoC und FPGA Families.

HSSL Specs

HSSL Operates at Baud Rates Up To 320 Mbaud – Delivering Net Payload Rate ~84 %. Interface Requires Only Five Pins – Two LVDS Pairs und Single Clock Line – Making It Both Cost-Effective und Pin-Efficient. Traditionally Used für Data Exchange Between AURIX Devices und Custom ASICs, New Core Expands Capability zu Xilinx Devices – Enabling Mutual Access Internal und External Resources.

Synergy für Safety-Critical Applications

Mit logiHSSL Kombinieren System Designer Proven Safety/Security Features AURIX Mikrocontroller mit Extensive Functional Versatility Xilinx Hardware. Synergy Ideal für Automotive, Industrial, Other Safety-Critical Applications Demanding Rapid Data Transfer und Robust Protection.

Starter Kit für Accelerated Development

Partners Offer Starter Kit: Xilinx Evaluation Board, Infineon AURIX Evaluation Board, Xylon FMC Board. Kit Includes Reference Design, Test Software, Xylon logicBRICKS Evaluation Licenses, Comprehensive Documentation, Dedicated Technical Support.